The present invention relates to a substrate for mounting a semiconductor integrated circuit device such as a film carrier tape on which a semiconductor integrated circuit device for driving a display panel.
COG (Chip On Glass) mounting method and TCP (Tape Carrier Package) mounting method are conventionally known as methods to mount an integrated circuit chip for driving liquid crystal (will be referred to as liquid crystal driver LSI chip) on a liquid crystal display. The COG mounting method is to mount a liquid crystal driver LSI chip directly on a lower glass substrate of a liquid crystal panel.
On the other hand, the TCP mounting method is to mount a liquid crystal driver LSI chip on an insulating film using TCP technique. In this method, the insulating film includes a copper wiring pattern, and a part of the pattern jutting into a device hole section formed on the film is called an inner lead section.
Tips of these inner lead sections are electrically connected to electrodes (bumps) of a liquid crystal driver LSI chip situated in the device hole section. Also, the insulating film includes a copper wiring for electrical connection to the outside, i.e. an outer lead section. A tip of this outer lead section is electrically connected to a liquid crystal panel or a wiring substrate.
For instance, provided that a TCP and a liquid crystal panel are electrically connected, the outer lead section is bonded to ITO (Indium Tin Oxide) terminal on a lower glass substrate of the panel via such as ACF (Anisotropic Conductive Film) by thermocompression.
On account of this, multiple TCP-type liquid crystal driver LSI chips are mounted on a periphery of the liquid crystal panel, and the panel is driven.
FIG. 5 schematically shows a liquid crystal driver LSI chip 101 being mounted on a film carrier tape 102, to form a TCP. The film carrier tape 102 is formed by setting a predetermined wiring pattern on a band-shaped insulating film carrier tape substrate 103.
The film carrier tape 102 is torn off along broken line L shown in FIG. 5, to form TCP 104 each containing a liquid crystal driver LSI chip 101.
Since many output terminals are arranged along the output side of the liquid crystal driver LSI chip 101, the chip looks like an extremely slim rectangle, if viewed from above. Therefore, the liquid crystal driver LSI chip 101 is typically mounted so that its longer side lies across the film carrier tape 102 (in Y direction).
The liquid crystal driver LSI chips 101 are mounted in a single line with a predetermined interval (distance a) between each other along the length (X direction) of the film carrier tape 102.
On the film carrier tape substrate 103, input lead sections 105 and output lead sections 106 are formed as the wiring pattern described above, to connect the liquid crystal driver LSI chip 101 to other devices.
The input lead sections 105 are for receiving a signal to the liquid crystal driver LSI chip 101. The output lead sections 106 are for transmitting a driving signal from the liquid crystal driver LSI chip 101 to a liquid crystal panel.
Furthermore, input test terminals (pads) 107 are formed on tips of the input lead sections 105. Output test terminals 108 (pads) are formed on tips of the output lead sections 106.
The input test terminals 107 and the output test terminals 108 are used for making contact with probes of a wafer prober, when the liquid crystal driver LSI chip 101 is examined.
That is to say, when the liquid crystal driver LSI chip 101 is examined, control signals for various testing coming from an external testing device, reference voltages for a gray scale, and power supply of the liquid crystal driver LSI are fed from the probes of the wafer prober to the liquid crystal driver LSI chip 101 via the input test terminals 107.
Then an output signal (mainly an output signal for driving the liquid crystal panel) from the liquid crystal driver LSI chip 101 is input to the testing device from the output test terminals 108 via the probes of the wafer prober, to examine response characteristics of the output signal and output voltage error.
By doing this, the quality of the liquid crystal driver LSI chip 101 including its condition of mounting on the film carrier tape 102 is judged.
By the way, after the testing, the input test terminals 107 and the output test terminals 108 are cut off from the TCP 104, when the film carrier tape 102 is torn off along broken line L to obtain the TCPs 104.
By this cutting-off, tips of the input lead sections 105 and the output lead sections 106 of the TCP 104 become outer lead sections with their solder resists uncovered. The outer lead sections are made to be electrically connected with the liquid crystal panel or other wiring substrates as described above.
Moreover, in the film carrier tape substrate 103, sprocket holes 109 are made along one edge of the substrate and sprocket holes 110 are also made along the other edge, both at regular intervals. The sprocket holes 109 and 110 are symmetrically located in X direction.
These sprocket holes 109 and 110 are used to transport the film carrier tape substrate 103 by using sprockets, and also to align the liquid crystal driver LSI chip 101 when mounting.
Each liquid crystal driver LSI chip 101 is mounted so that a middle point of line O (connecting in Y direction through centers of both sprocket holes 109 and 110) and the center of the chip 101 are matched (see the chip 101 on the left side of the figure).
Therefore, in X direction, the liquid crystal driver LSI chips 101 are situated so that a pitch between the chips is an integral multiple of a pitch between the sprocket holes 109 and 110 (distance b in the figure).
The pitch between the sprocket holes 109 and 110 (b in the figure) is set at 4.75 mm by JIS, the Japanese Industrial Standards. So, if the distance from the edge of the input test terminals 107 to the edge of the output test terminals 108 (distance c in the figure) is set at 6.0 mm, one liquid crystal driver LSI chip 101 can be mounted at every two pitches of the sprocket hole 109 and 110, to accommodate as many chips as possible.
Now, an arrangement of the input test terminals 107 and the output test terminals 108 is described. Since the input lead sections 105 (input test terminals 107) are fewer than the output lead sections 106 (output test terminals 108), as FIG. 5 shows, the input lead sections 105 are arranged in a single line in Y direction.
On the other hand, the number of required output lead sections 106 (output test terminals 108) in one liquid crystal driver LSI chip 101 is decided in accordance with a number of pixels of the liquid crystal panel corresponding to each color of red, green and blue. For instance, 128xc3x973=384 output lead sections 106 (shown as output 1 to output N in the figure) are required to drive 384 pixels. Thus the output lead sections 106 (output test terminals 108) are considerably large in number.
Also, as the number of the pixels have increased in accordance with upsizing and improvement of the resolution of the liquid crystal panel, the number of the output lead sections 106 (output test terminals 108) in one liquid crystal driver LSI chip 101 has been increasing.
Hence if the output test terminals 108 are arranged in a single line in Y direction as FIG. 5 shows, it is impossible to accommodate all of them within the width of the film carrier tape substrate 103.
Thus, in practical use the output test terminals 108 are arranged in four tiers in X direction as FIG. 6 shows. (See FIG. 27 (Hitachi standard TCP) of xe2x80x9cHitachi LCD Driver LSI Databookxe2x80x9d: the sixth edition, published by Applied Technology Sector of Hitachi Microcomputer System Co. Ltd., in March 1992)
In this case, since an area in which the output test terminals 108 are arranged expands in X direction of the film carrier tape 102, distance c becomes longer. By the way, numbers I1, . . . , I(Nxe2x88x921), IN and O1, . . . , O(Nxe2x88x921), ON are assigned to describe how N input test terminals 107 and N output test terminals 108 are arranged.
In the multi-tier arrangement of the output test terminals 108 in X direction as above, the number of required tiers depends on the minimum allowed size of the terminal 108 and the width of the TCP 104. The minimum allowed size of the output test terminal 108 is decided by a number of the output terminals of the liquid crystal driver LSI chip 101 and a pitch between the probes of the wafer prober.
To cut costs in producing a liquid crystal display device, an arrangement that has recently been studied is to increase the number of output terminals of the liquid crystal driver LSI chip 101, at the same time decrease the number of required liquid crystal driver LSI chips 101 for one liquid crystal display.
For this arrangement, the multi-tier arrangement of the output test terminals 108 is absolutely necessary, so the terminals are arranged in four tiers or six tiers or even more, depending on the number of the output terminals.
However, the conventional arrangement of the film carrier tape 102 has problems as follows:
since the output test terminals 108 are arranged in several tiers along the length of the film carrier tape substrate 103 (in X direction), distance c from the edge of the input test terminals 107 to the edge of the output test terminals 108 becomes longer.
So the length of the film carrier tape 103 necessary for each liquid crystal driver LSI chip 101 becomes longer as well.
The length of the film carrier tape substrate 103 becomes even longer, because the pitch between the chips 101 has to be an integral multiple of the pitch between the sprocket holes 109 and 110 that is required to be 4.75 mm by the regulation.
Therefore, the film carrier tape substrate 103 cannot be utilized efficiently, and the cost for each TCP 104 becomes higher.
An object of the present invention is to offer a substrate for mounting a semiconductor integrated circuit device realizing cost-reduction of a per-unit price of TCPs, by utilizing a film carrier tape substrate (insulating substrate) efficiently.
In order to fulfil the above, the substrate for mounting a semiconductor integrated circuit device of the present invention contains:
lead sections formed on the insulating substrate and connected to at least one of an input terminal and an output terminal of a mounted semiconductor integrated device; and
a test terminal formed on a tip of each of the lead sections,
wherein:
the lead sections and the test terminals are divided into blocks, and in each of the blocks, an outermost pair of the test terminals extends inwards to oppose each other and is located relatively far from a place where the semiconductor integrated circuit device is mounted.
In the arrangement above, one block includes the test terminals corresponding to some of the lead sections which are connected to output terminals of the semiconductor integrated circuit device.
Two test terminals connected to the outermost lead sections are paired, and extend inwards to oppose each other.
Also, the pair of the test terminals is located relatively far from a place where the semiconductor integrated circuit device is mounted.
As a result, a dimension required to form the test terminals and the lead sections on the insulating substrate can be reduced in a direction of a row of the lead sections, by arranging the test terminals connected to the outermost lead sections and setting widths of the test terminals adequately.
On account of this, the insulating substrate can be utilized efficiently, and thus a per-unit price of products mounting semiconductor integrated circuit devices such as a tape carrier package can be reduced.